library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.std_logic_unsigned.ALL;
--- combinatorial circuit

entity div_base_4_subtraction_layer is
	PORT(
	denominator : in STD_LOGIC_VECTOR(31 downto 0);
	mult3_overflow : in STD_LOGIC;
	mult3_result : in STD_LOGIC_VECTOR(31 downto 0);
	old_partial_remainder : in STD_LOGIC_VECTOR(31 downto 0);
	
	quotient_digit : out STD_LOGIC_VECTOR(1 downto 0);
	new_partial_remainder : out STD_LOGIC_VECTOR(31 downto 0)
	);
end div_base_4_subtraction_layer;

architecture Behavioral of div_base_4_subtraction_layer is
	
	component div_base_4_unsigned_32_comparator is
		PORT (
		A : in STD_LOGIC_VECTOR(31 downto 0);
		B : in STD_LOGIC_VECTOR(31 downto 0);
		
		is_ge : out STD_LOGIC; -- '1' if A >= B
		diff : out STD_LOGIC_VECTOR(31 downto 0) --- A-B, if A > B. if not, "00...".
		);
	end component;
	
	signal mult3_ok : STD_LOGIC;
	signal mult3_sub : STD_LOGIC_VECTOR(31 downto 0);
	
	signal mult2_ok : STD_LOGIC;
	signal mult2_sub : STD_LOGIC_VECTOR(31 downto 0);
	
	signal mult1_ok : STD_LOGIC;
	signal mult1_sub : STD_LOGIC_VECTOR(31 downto 0);
	
begin

	mult3 : div_base_4_unsigned_32_comparator
	port map (
		A => old_partial_remainder,
		B => mult3_result,
		
		is_ge => mult3_ok,
		diff => mult3_sub
	);
	
	mult2 : div_base_4_unsigned_32_comparator
	port map (
		A => old_partial_remainder,
		B(31 downto 1) => denominator(30 downto 0),
		B(0) => '0',
		
		is_ge => mult2_ok,
		diff => mult2_sub
	);
	
	mult1 : div_base_4_unsigned_32_comparator
	port map (
		A => old_partial_remainder,
		B => denominator,
		
		is_ge => mult1_ok,
		diff => mult1_sub
	);
	

	process(denominator, mult3_overflow, mult3_result, old_partial_remainder, mult3_ok, mult2_ok, mult1_ok, mult3_sub, mult2_sub, mult1_sub)
		
	begin
	
		if (mult3_ok = '1' and mult3_overflow = '0') then
			quotient_digit <= "11";
			new_partial_remainder <= mult3_sub;
		elsif (mult2_ok = '1' and denominator(31) = '0') then
			quotient_digit <= "10";
			new_partial_remainder <= mult2_sub;
		elsif (mult1_ok = '1') then
			quotient_digit <= "01";
			new_partial_remainder <= mult1_sub;
		else
			quotient_digit <= "00";
			new_partial_remainder <= old_partial_remainder;
		end if;
	
		---if (mult3_overflow = '0' and mult3_result <= old_partial_remainder) then --- quotient digit = 3
		---	quotient_digit <= "11";
		---	new_partial_remainder <= old_partial_remainder-mult3_result;
		---elsif (denominator(31) = '0' and (denominator(30 downto 0) & "0" <= old_partial_remainder)) then --- quotient digit = 2
		---	quotient_digit <= "10";
		---	new_partial_remainder <= old_partial_remainder-(denominator(30 downto 0) & "0");
		---elsif (denominator <= old_partial_remainder) then --- quotient digit = 1
		---	quotient_digit <= "01";
		---	new_partial_remainder <= old_partial_remainder - denominator;
		---else --- quotient digit = 0
		---	quotient_digit <= "00";
		---	new_partial_remainder <= old_partial_remainder;
		---end if;
		
	end process;

end Behavioral;

